This invention relates to digital switching networks in general and more particularly to a unique arrangement of such a network including a time slot interchanger and a controlling processor which enables an optimum and efficient use of common circuits included in the switching network system.
Essentially, the telephone switching system can be considered as a data switching system as the ability to make connections between various subscribers is inherent in various types of communication systems presently being employed. A conventional type of such a system is, of course, the telephone switching system. Telephone switching is the means by which a communication channel capable of carrying analog or digital information between any two subscribers is established and maintained. Such telephone switching systems are relatively complicated in that overall operation consists of many intricate details. Based on the fact that such switching systems are intricate, their operation cannot be appreciated without the ability to evaluate and understand operation and details in the system.
A paramount concern with the design of any switching system is, of course, concerned with the economics of the system and the overall desire to reduce system complexity, while maintaining a resonable cost for each subscriber line. In this manner, the system can be expanded economically. In actual practice, it is also desirable to reduce the amount of hardware used in system control or, in turn, to attempt to use the same hardware to perform multiple functions without sacrificing the overall operation of the system to enable servicing of all subscribers.
Modern day switching systems employ digital techniques and essentially are referred to as electronic automatic switching systems. In such switching systems, a stored program digital computer is employed for controlling essentially, all switching system functions. An example of an early type of system is the Bell System No. 1 ESS. There are, of course, many other systems by other companies, such as the Assignee herein, which employ digital techniques employing central processors to control the system functions. In such systems, the speed of handling calls is greatly increased over electromechanical systems, while a stored program central control allows great flexibility in accommodating system changes and offerring additional services.
Many of the prior art systems are referred to as space division systems. The term space division implies that communications through the system are made on a relatively random basis according to the requests of a subscriber. Other systems employ a time division technique, which essentially will only allow a subscriber to be connected or to be serviced during a time slot reserved for that subscriber. Both techniques possess certain advantages and disadvantages.
In any event, digital systems utilize multiplex transmission in order to increase efficiency. In such systems, several types of modulation techniques may be employed. The most popular and widely used technique is pulse code modulation or PCM. These techniques essentially enable use of the communication channel such that the information to be conveyed over the channel is a pulse or train of pulses, which may be modulated in amplitude width or position by the message information. The use of PCM in digital switching networks is well known and techniques for providing such signals are also well known. For example, see a text entitled "Transmission Systems for Communications" by Bell Telephone Laboratories, Inc., 3rd Edition (1964).
In modern day practice, a useful digital switching network will also contain at least one stage of time slot switching using a time slot interchanger (TSI). The time slot interchanger enables information appearing in an input time slot to be delayed and then inserted in a different output time slot. This enables the efficient and rapid transfer of information to various points in the switching system. Basically, the TSI consists of a memory and control circuits, which provide access to and from the memory. These control circuits include a connection list memory, which contains a list of input to output connections.
In the basic switching system, subscriber telephone lines are connected to a concentration/expansion stage which is followed by a network switching stage. Essentially, the concentration/expansion stage constitutes the basic switching network. For example, this basic technique is shown in many references including a text entitled "Switching System" by the American Telephone and Telegraph Co. (1961), Chapter 2 entitled "Basic Switching Concepts". In any event, as will be explained, it is possible to combine these functions into a single TSI stage and hence, one can now employ a TSI with fewer outputs than inputs.
As is known in a telephone switching system, each subscriber line must be continuously scanned so that subscribers requesting service can be recognized and a connection be set up through the system. As above indicated, in digital switching systems, scanning is accomplished by means of a system scanner which will recognize a service request and inform the central processor or central control of such a request. The central processor will then connect a subscriber to a dialing register and eventually connect the subscriber line or the calling to the called line. Essentially, the processor must receive the subscriber line scan results and be able to initiate action at the called line by setting up ringing and so on.
In the present switching systems, the scanning functions and control functions are not and have never been part of the TSI function. The difficulty with these systems is evidenced by the complexity required and the necessity to distribute the input/output circuits of the central processor to a large number of telephone lines.
As will be explained, this invention relates to a new organization of a time slot interchanger and an associated controlling processor that enables common circuitry to be used, both for the time switching function and for the scanning and control functions. Essentially, the organization requires that the TSI memory be incorporated as part of the processor memory. In this manner, the time switching function is implemented with the direct memory access circuits (DMA). Scanning information samples are presented to the TSI together with information samples and are stored in the TSI memory which is part and parcel of the processor memory. In the system to be described, the processor can therefore scan all subscriber lines using a simple memory search. In a similar manner, the control signals are available from the TSI with each information sample and both are read from the TSI memory. Accordingly, the processor is adapted to send control signals directly to the subscriber line by writing the correct information into the TSI memory.
In the system to be described, the same timing and control circuits used to collect and distribute information samples (as voice samples in a PCM switch), are also used to collect and distribute scanning and control information. Scanning and control information is sometimes referred to as signalling functions to distinguish the same from supervisory functions and line control functions.
As will be explained, in order to employ the TSI as above described, one requires the use of a larger memory word which is now adapted to accommodate the signalling bits. Essentially, the organization of this system is extremely powerful, as it enables the processor to read and write information bits as well as signalling bits. In the system to be described, this capability of the processor is employed to create communication paths between different processors, to digital generator tone signals, and to allow the processor to perform digital signal processing on information samples.
While it is understood that an effective interface is required between the processor and the TSI, it is no more complex than the ordinary interface which presently exists in conventional processors. For example, any processor as presently employed must have the capability of interfacing with the system memory. In this system, based on the organization of the TSI and processor memory as well as the structural organization of the system, one achieves widespread flexibility in regard to the type of central processor used and the system is capable of utilizing the input/output structure of most general processors and hence, is not tied to one particular structure.
It will also be shown that in this system, as in a conventional digital telephone network which includes digital transmission and digital switching, it is necessary to control the access to, and assignment of the time slots employed on PCM carrier structures used for trunking between network switching points. To accomplish this control, it is necessary to have communications between the control units or processors which are located at each switching point. In such an arrangement, it is often desirable to include the control communications within the PCM carrier data format for reasons of economy and convenience. A problem results in including the control communications in the PCM data format based on the fact that the PCM carrier is a fully synchronous digital transmission circuit, which circuit is normally designed primarily for voice communication. In any event, the control communications occur between asynchronous control units. In prior art digital switching systems, designers employed a bit sealing technique. In such techniques, one employed either a framing bit or a signalling bit to permit the assembly and disassembly of messages between the asynchronous control circuits. Accordingly, buffer memory systems, direct memory access systems and interrupt systems have been used in the prior art to account for the asynchronous interface. Such solutions result in significant problems in that the complexity of the interface units between the control unit and the communications control channel require an inordinate amount of hardware, which makes such systems unreliable in operation and extremely difficult to service. Furthermore, the data rate is extremely low and message transmission is only accommodated in relatively long transmission times.
As will be explained, the system described herein further includes a technique for employing a synchronous PCM time slot as an asynchronous control communications channel. The technique allows both slow speed and high speed burst communications between two asynchronous processors by using a simple data format which enables the automatic detection of null characters, control characters and data characters.
As will be explained, by employing the synchronous PCM time slot together with the unique TSI organization, one achieves a control communications path of an extremely simple structure which requires no additional circuit elements.